Decoder
The DecodeAndSortAll program is used to convert data recored by different modules one run into a ROOT file. The user’s physical analysis is based on the ROOT file generated by this program. The data generated by this program has been arranged in ascending order of timestamp.
The user first needs to modify the definition in the UesrDefine.hh file
// #define ONLYPHA
// #define ONLYPSD
// #define ONLYZLE
// #define ONLYSCOPE
If all modules in the DAQ only use one type of firmware, enable the corresponding definition. If there is no definition of a single firmware, the output data file will default to supporting all types of firmware.
#define ROOTFILEPATH "./" //the path of ROOT file
#define ROOTFILENAME "data" //the name of ROOT file
// The path and file name for ROOT files
#define RAWFILEPATH "/home/wuhongyi/" //Path of raw data
#define RAWFILENAME "data" //The file name of the raw data
#define MODNUMBER 2 //Number of modules used in the chassis
const unsigned short SamplingRate[MODNUMBER] = {500, 125};//Specify the sampling rate of each modules separately; 125/500/1000 sampling rates; 0 to skip the module
const unsigned short Firmware[MODNUMBER] = {2, 0};//DPP_PHA=0 DPP_ZLE=1 DPP_PSD=2 DPP_DAW=3 OPEN=4 Scope=5
// Specify the firmware type for each module. If the type is specified incorrectly, there will be issues decoding the data
After modification, execute the following command to compile the program:
make clean
make
After successful compilation, an executable file decodeandsort will be generated, and the program will run as follows:
./decodeandsort [RunNnumber]
Among them, [RunNnumber] is the running number of the file you want to convert.
PHA/PSD data structure
flahshigh
- bit 0 Pile-Up
Identifies pile-up events, ie two events in which the second one occurred before the Peaking Time of the first one. Both are then tagged as pile-up because it’s not possible to evaluate their energy. See EnergyFilterPeakingPosition
- bit 1 Pile-up rejector guard event
Identifies an event occurred during the pile-up rejector guard window. See EnergyFilterPileUpGuardT, EnergyFilterPileUpGuardS. There are cases in which both such bits can be ‘1’: if an event ccurs in the pile-up rejector guard of the previous one and does not reach the peaking time because another event has occurred, then such event will have both bits at 1. This allows, with the same data and without doing two separate acquisitions, to have two spectra: one corrected for the PUR guard and one not corrected
- bit 2 Event Saturation
Identifies an event in which a saturation of the input dynamics occurred
- bit 3 Post saturation event
Identifies an event occurred during the ADCVetoWidth time
- bit 4 Trapezoid saturation event
Identifies an event in which a saturation of the trapezoid occurred.
- bit 5 SCA selected event
Identifies an event falling within the SCA windows (if enabled).
flahslow
- bit 0 Event waveform occurred during external inhibit
Identifies a saved waveform because occurred when the external inhibit is active (useful in case of Transistor Reset Preamplifier detector use to see what happens during the reset).
- bit 1 Event waveform under-saturation
Identifies a saved waveform because under-saturating
- bit 2 Event waveform oversaturation
Identifies a saved waveform because over-saturating
- bit 3 External trigger
Identifies an event triggered by the external trigger from the TRG-IN connector
- bit 4 Global trigger
Identifies an event triggered by a global trigger condition
- bit 5 Software trigger
Identifies an event triggered by a software trigger
- bit 6 Self trigger
Identifies an event triggered by the single channel self trigger
- bit 7 LVDS trigger
Identifies an event triggered by the external trigger from the LVDS connector
- bit 8 64 channel trigger
Identifies an event triggered by another (or a combination of other) channels trigger
- bit 9 ITLA trigger
Identifies an event triggered by the ITLA logic
- bit 10 ITLB trigger
Identifies an event triggered by the ITLB logic